PIC MICROCRONTROLLER

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PIC series Microcontroller IC 8-Bit 40MHz 32KB (16K x 16) FLASH 40-PDIP

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Power Management Features: • Run: CPU on, Peripherals on • Idle: CPU off, Peripherals on • Sleep: CPU off, Peripherals off • Ultra Low 50nA Input Leakage • Run mode Currents Down to 11 μA Typical • Idle mode Currents Down to 2.5 μA Typical • Sleep mode Current Down to 100 nA Typical • Timer1 Oscillator: 900 nA, 32 kHz, 2V • Watchdog Timer: 1.4 μA, 2V Typical • Two-Speed Oscillator Start-up Flexible Oscillator Structure: • Four Crystal modes, up to 40 MHz • 4x Phase Lock Loop (PLL) – Available for Crystal and Internal Oscillators • Two External RC modes, up to 4 MHz • Two External Clock modes, up to 40 MHz • M (bytes) Peripheral Highlights (Continued): • Master Synchronous Serial Port (MSSP) module Supporting 3-Wire SPI (all 4 modes) and I2C™ Master and Slave modes • Enhanced Addressable USART module:- Supports RS-485, RS-232 and LIN/J2602- RS-232 operation using internal oscillator block (no external crystal required)- Auto-wake-up on Start bit- Auto-Baud Detect • 10-Bit, up to 13-Channel Analog-to-Digital (A/D) Converter module:- Auto-acquisition capability- V In-Circuit Serial Programming™ (ICSP™) via Two Pins • In-Circuit Debug (ICD) via Two Pins • Wide Operating Voltage Range: 2.0V to 5.5V • Programmable Brown-out Reset (BOR) with Software Enable Option Data Memory EEPROM (bytes) MSSP I/O 10-Bit A/D (ch) CCP/ ECCP (PWM) SPI Master I2C™ PIC18F2420 PIC18F2520 PIC18F4420 PIC18F4520 16K 32K 

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32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM) with Graphics Interface, USB, CAN, and Ethernet 

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This document contains device-specific information for the following devices: This expands on the existing line of Microchip‘s 16-bit microcontrollers, combining an expanded peripheral feature set and enhanced computational performance with a new connectivity option: USB On-The-Go. The PIC24FJ256GB110 family provides a new platform for high-performance USB applications, which may need more than an 8-bit platform, but don’t require the power of a digital signal processor. 1.1 Core Features 1.1.1 16-BIT ARCHITECTURE Central to all PIC24F devices is the 16-bit modified Harvard architecture, first introduced with Microchip’s dsPIC® digital signal controllers. The PIC24F CPU core offers a wide range of enhancements, such as: • 16-bit data and 24-bit address paths with the ability to move information between data and memory spaces • Linear addressing of up to 12 Mbytes (program space) and 64 Kbytes (data) • A 16-element working register array with built-in software stack support • A 17 x 17 hardware multiplier with support for integer math • Hardware support for 32 by 16-bit division • An instruction set that supports multiple addressing modes and is optimized for high-level languages such as ‘C’ • Operational performance up to 16 MIPS 1.1.2 POWER-SAVING TECHNOLOGY All of the devices in the PIC24FJ256GB110 family incorporate a range of features that can significantly reduce power consumption during operation. Key items include: • On-the-Fly Clock Switching: The device clock can be changed under software control to the Timer1 source or the internal, Low-Power RC Oscillator during operation, allowing the user to incorporate power-saving ideas into their software designs. • allowing incremental power savings without missing a beat. •  devices in the PIC24FJ256GB110 family offer five different oscillator options, allowing users a range of choices in developing application hardware. These include: • Two Crystal modes using crystals or ceramic resonators. • Two External Clock modes offering the option of a divide-by-2 clock output. • A Fast Internal Oscillator (FRC) with a nominal 8 MHz output, which can also be divided under software control to provide clock speeds as low as 31 kHz. • A Phase Lock Loop (PLL) frequency multiplier, available to the external oscillator modes and the FRC Oscillator, which allows clock speeds of up to 32 MHz. • A separate internal RC Oscillator (LPRC) with a fixed 31 kHz output, which provides a low-power option for timing-insensitive applications. The internal oscillator block also provides a stable reference source for the Fail-Safe Clock Monitor. This option constantly monitors the main clock source against a reference signal provided by the internal oscillator and enables the controller to switch to the internal oscillator, allowing for continued low-speed operation or a safe application shutdown. 1.1.4 EASY MIGRATION Regardless of the memory size, all devices share the same rich set of peripherals, allowing for a smooth migration path as applications grow and evolve. The consistent pinout scheme used throughout the entire family also aids in migrating from one device to the next larger, or even in jumping from 64-pin to 100-pin devices. The PIC24F family is pin-compatible with devices in the dsPIC33 family, and shares some compatibility with the pinout schema for PIC18 and dsPIC30. This extends the ability of applications to grow from the relatively simple, to the powerful and complex, yet still selecting a Microchip device. • PIC24FJ64GB106 • PIC24FJ192GB108 • PIC24FJ128GB106 • PIC24FJ256GB108 • PIC24FJ192GB106 • PIC24FJ64GB110 • PIC24FJ256GB106 • PIC24FJ128GB110 • PIC24FJ64GB108 • PIC24FJ192GB110 • PIC24FJ128GB108 • PIC24FJ256GB110

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s • 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS • 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS Core: 16-bit dsPIC33F CPU • Code-efficient (C and Assembly) architecture • Two 40-bit wide accumulators • Single-cycle (MAC/MPY) with dual data fetch • Single-cycle mixed-sign MUL plus hardware divide Clock Management • ±2% internal oscillator • Programmable PLLs and oscillator clock sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer (WDT) • Fast wake-up and start-up Power Management • Low-power management modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset • 2.1 mA/MHz dynamic current (typical) • 50 μA IPD current (typical) Advanced Analog Features • Two ADC modules: - Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H - 18 analog inputs on 64-pin devices and up to 32 analog inputs on 100-pin devices • Flexible and independent ADC trigger sources Timers/Output Compare/Input Capture • Up to nine 16-bit timers/counters. Can pair up to make four 32-bit timers. • Eight Output Compare modules configurable as timers/counters • Eight Input Capture modules Communication Interfaces • Two UART modules (10 Mbps) - With support for LIN 2.0 protocols and IrDA® • Two 4-wire SPI modules (15 Mbps) • Up to two I2C™ modules (up to 1 Mbaud) with SMBus support • Up to two Enhanced CAN (ECAN) modules (1 Mbaud) with 2.0B support • Data Converter Interface (DCI) module with I2S codec support Input/Output • Sink/Source up to 10 mA (pin specific) for standard VOH/VOL, up to 16 mA (pin specific) for non-standard VOH1 • 5V-tolerant pins • Selectable open drain, pull-ups, and pull-downs • Up to 5 mA overvoltage clamp current • External interrupts on all I/O pins Qualification and Class B Support • AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) • AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) • Class B Safety Library, IEC 60730 Debugger Development Support • In-circuit and in-application programming • Two program and two complex data breakpoints • IEEE 1149.2-compatible (JTAG) boundary scan • Trace and run-time watch Packages Type QFN TQFP TQFP TQFP Pin Count 64 64 80 100 Contact Lead/Pitch 0.50 0.50 0.50 0.40 I/O Pins 53 53 69 85 Dimensions 9x9x0.9 10x10x1 12x12x1 14x14x1 Note: All dimensions are in millimeters (mm) unless specified. dsPIC33F General Purpose Family Controllers Device Pins Program Flash Memory (Kbyte) RAM (Kbyte)(1) 16-bit Timer Input Capture Output Compare Std. PWM Codec Interface ADC UART SPI I 2C™ Enhanced CAN™ I/O Pins (Max)(2) Packages dsPIC33FJ64GP206A 64 64 8 9 8 8 1 1 ADC, 18 ch 2 2 1 0 53 PT, MR dsPIC33FJ64GP306A 64 64 16 9 8 8 1 1 ADC, 18 ch 2 2 2 0 53 PT, MR dsPIC33FJ64GP310A 100 64 16 9 8 8 1 1 ADC, 32 ch 2 2 2 0 85 PF, PT dsPIC33FJ64GP706A 64 64 16 9 8 8 1 2 ADC, 18 ch 2 2 2 2 53 PT, MR dsPIC33FJ64GP708A 80 64 16 9 8 8 1 2 ADC, 24 ch 2 2 2 2 69 PT dsPIC33FJ64GP710A 100 64 16 9 8 8 1 2 ADC, 32 ch 2 2 2 2 85 PF, PT dsPIC33FJ128GP206A 64 128 8 9 8 8 1 1 ADC, 18 ch 2 2 1 0 53 PT, MR dsPIC33FJ128GP306A 64 128 16 9 8 8 1 1 ADC, 18 ch 2 2 2 0 53 PT, MR dsPIC33FJ128GP310A 100 128 16 9 8 8 1 1 ADC, 32 ch 2 2 2 0 85 PF, PT dsPIC33FJ128GP706A 64 128 16 9 8 8 1 2 ADC, 18 ch 2 2 2 2 53 PT, MR dsPIC33FJ128GP708A 80 128 16 9 8 8 1 2 ADC, 24 ch 2 2 2 2 69 PT dsPIC33FJ128GP710A 100 128 16 9 8 8 1 2 ADC, 32 ch 2 2 2 2 85 PF, PT dsPIC33FJ256GP506A 64 256 16 9 8 8 1 1 ADC, 18 ch 2 2 2 1 53 PT, MR dsPIC33FJ256GP510A 100 256 16 9 8 8 1 1 ADC, 32 ch 2 2 2 1 85 PF, PT dsPIC33FJ256GP710A 100 256 30 9 8 8 1 2 ADC, 32 ch 2 2 2 2 85 PF, PT

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PIC Microcontroller
PIC16F688-I/P PIC16F628A-I/P PIC16F877A-I/P PIC16F883-I/SP PIC12F508-I/P Pic16F886-I/SP PIC16F886PIC16F688-I/P PIC16F628A-I/P PIC16F877A-I/P PIC16F883-I/SP PIC12F508-I/P Pic16F886-I/SP PIC16F886PIC16F688-I/P PIC16F628A-I/P PIC16F877A-I/P PIC16F883-I/SP PIC12F508-I/P Pic16F886-I/SP PIC16F886PIC16F688-I/P PIC16F628A-I/P PIC16F877A-I/P PIC16F883-I/SP PIC12F508-I/P Pic16F886-I/SP PIC16F886PIC16F688-I/P PIC16F628A-I/P PIC16F877A-I/P PIC16F883-I/SP PIC12F508-I/P Pic16F886-I/SP PIC16F886.

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dsPIC33CH128MP508 FAMILY 28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD) Operating Conditions • 3V to 3.6V, -40°C to +125°C:- Master Core: DC to 90 MIPS- Slave Core: DC to 100 MIPS Core: Dual 16-Bit dsPIC33CH CPU • Master/Slave Core Operation • Independent Peripherals for Master Core and Slave Core • Dual Partition for Slave PRAM LiveUpdate • Configurable Shared Resources for Master Core and Slave Core • Master Core with 64-128 Kbytes of Program Flash with ECC and 16K RAM • Slave Core with 24 Kbytes of Program RAM (PRAM) with ECC and 4K Data Memory RAM • Fast 6-Cycle Divide • Message Boxes and FIFO to Communicate Between Master and Slave (MSI) • Code Efficient (C and Assembly) Architecture • 40-Bit Wide Accumulators • Single-Cycle (MAC/MPY) with Dual Data Fetch • Single-Cycle, Mixed-Sign MUL Plus Hardware Divide • 32-Bit Multiply Support • Five Sets of Interrupt Context Selected Registers and Accumulators per Core for Fast Interrupt Response • Zero Overhead Looping Clock Management • Internal Oscillator • Programmable PLLs and Oscillator Clock Sources • Master Reference Clock Output • Slave Reference Clock Output • Fail-Safe Clock Monitor (FSCM) • Fast Wake-up and Start-up • Backup Internal Oscillator • LPRC Oscillator Power Management • Low-Power Management Modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset High Resolution PWM with Fine Edge Placement • Up to 12 PWM Channels:- Four channels for Master- Eight channels for Slave • 250 ps PWM Resolution • Applications Include:- DC/DC Converters- AC/DC power supplies- Uninterruptable Power Supply (UPS)- Motor Control: BLDC, PMSM, SR, ACIM Timers/Output Compare/Input Capture • Two General Purpose 16-Bit Timers:- One each for Master and Slave • Peripheral Trigger Generator (PTG) Module:- One module for Master- Slave can interrupt on select PTG sources- Useful for automating complex sequences • 12 SCCP Modules:- Eight modules for Master- Four modules for Slave- Timer, Capture/Compare and PWM Modes- 16 or 32-bit time base- 16 or 32-bit capture- 4-deep capture buffer- Fully Asynchronous Operation, Available in Sleep Modes

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16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog Operating Conditions  3.0V to 3.6V, -40oC to +125oC, DC to 60 MIPS  3.0Vto3.6V,-40oCto+85oC,DCto70MIPS Core: 16-Bit dsPIC33E/PIC24E CPU  Code-Efficient (C and Assembly) architecture  Two 40-Bit Wide Accumulators  Single-Cycle (MAC/MPY) with Dual Data Fetch  Single-Cycle Mixed-Sign MUL Plus Hardware Divide  32-Bit Multiply Support Clock Management  2% Internal Oscillator  Programmable PLLs and Oscillator Clock Sources  Fail-Safe Clock Monitor (FSCM)   Independent Watchdog Timer  Fast Wake-up and Start-up Power Management  Low-Power Management modes (Sleep, Idle, Doze)  Integrated Power-on Reset and Brown-out Reset  1.0 mA/MHz Dynamic Current (typical)  60  A IPD Current (typical) High-Speed PWM  Up to Seven PWM Pairs with Independent Timing  Dead Time for Rising and Falling Edges  8.32 ns PWM Resolution   PWM Support for: - DC/DC, AC/DC, Inverters, PFC, Lighting - BLDC, PMSM, ACIM, SRM  Programmable Fault Inputs   Flexible Trigger Configurations for ADC Conversions Advanced Analog Features  Two Independent ADC modules: - One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H - One 10-bit ADC, 1.1 Msps with four S&H - Eight S&H using both ADC 10-bit modules - 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices)  Flexible and Independent ADC Trigger Sources  Comparators: - Up to three Analog Comparator modules - Programmable references with 32 voltage points Timers/Output Compare/Input Capture  27 General Purpose Timers: - Nine 16-bit and up to four 32-bit Timers/Counters - 16 OC modules configurable as Timers/Counters - Two 32-bit Quadrature Encoder Interface (QEI) modules configurable as Timers/Counters  16 IC modules   Peripheral Pin Select (PPS) to allow Function Remap

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Operating Conditions • 2.3V to 3.6V, -40ºC to +105ºC (DC to 40 MHz 40ºC to +85ºC (DC to 50 MHz) Core: 50 MHz/83 DMIPS MIPS32® M4K® •MIPS16e® mode for up to 40% smaller code size • Code-efficient (C and Assembly) architecture • Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply Clock Management • 0.9% internal oscillator • Programmable PLLs and oscillator clock sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer • Fast wake-up and start-up Power Management • Low-power management modes (Sleep and Idle) • Integrated Power-on Reset, Brown-out Reset, and High Voltage Detect • 0.5 mA/MHz dynamic current (typical) •44 μA IPD current (typical) Audio/Graphics/Touch HMI Features • External graphics interface with up to 34 PMP pins • Audio data communication: I2S, LJ, RJ, USB • Audio data control interface: SPI and I2C • Audio data master clock:- Generation of fractional clock frequencies- Can be synchronized with USB clock- Can be tuned in run-time • Charge Time Measurement Unit (CTMU):- Supports mTouch® capacitive touch sensing- Provides high-resolution time measurement (1 ns) Advanced Analog Features • ADC Module:- 10-bit 1 Msps rate with one Sample and Hold (S&H)- Up to 48 analog inputs- Can operate during Sleep mode • Flexible and independent ADC trigger sources • On-chip temperature measurement capability • Comparators:- Three dual-input Comparator modules- Programmable reference with 32 voltage points Packages Type QFN  Microchip Technology Inc. DS60001290E-page  1

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PIC16F505T-I/ST  PIC16F505T-I/SL  PIC16F505-I/P  PIC12F508-E/SN  PIC12F508-E/MS  PIC12F509-I/MS PIC12F509-I/SN  PIC12F508-I/P  PIC12F508T-I/MS  PIC12F508T-I/SN  PIC12F509T-I/MS  PIC12F509T-I/SN PIC12F509-I/P  PIC12F508-E/P  PIC12F508-I/SN  PIC12F508-I/MS  PIC12F509-E/MS  PIC12F509-E/SN  PIC16F505I/ST  PIC16F505-I/SL  PIC16F505-E/P  PIC16F505-E/SL  PIC16F505-E/ST  PIC12F508T-I/MC  PIC12F509-I/MC PIC12F509-I/SM  PIC12F509T-I/MC  PIC12F509-E/P  PIC12F509T-E/SM  PIC12F509T-E/SN  PIC12F508T-E/SN PIC12F509-E/SM  PIC12F509T-I/SM  PIC12F508-I/MC  PIC12F508-E/MC  PIC12F509-E/MC  PIC16F505-E/MG PIC16F505-I/MG  PIC16F505T-I/MG

Devices Included In This Data Sheet: • PIC12F508 • PIC12F509 • PIC16F505 High-Performance RISC CPU: • Only 33 Single-Word Instructions to Learn • All Single-Cycle Instructions Except for Program Branches, which are Two-Cycle • 12-Bit Wide Instructions • 2-Level Deep Hardware Stack • Direct, Indirect and Relative Addressing modes for Data and Instructions • 8-Bit Wide Data Path • 8 Special Function Hardware Registers • Operating Speed: - DC – 20 MHz clock input (PIC16F505 only)- DC – 200 ns instruction cycle (PIC16F505 only)- DC – 4 MHz clock input- DC – 1000 ns instruction cycle Special Microcontroller Features: • 4MHz Precision Internal Oscillator:- Factory calibrated to ±1% • In-Circuit Serial Programming™ (ICSP™) • In-Circuit Debugging (ICD) Support • Power-On Reset (POR) • Device Reset Timer (DRT) • Watchdog Timer (WDT) with Dedicated On-Chip RC Oscillator for Reliable Operation • Programmable Code Protection • Multiplexed MCLR Input Pin • Internal Weak Pull-Ups on I/O Pins • Power-Saving Sleep mode • Wake-Wp from Sleep on Pin Change • Selectable Oscillator Options:- INTRC: 4MHz precision Internal oscillator- EXTRC: External low-cost RC oscillator- XT: Standard crystal/resonator- HS:- LP:- EC: High-speed crystal/resonator (PIC16F505 only) Power-saving, low-frequency crystal High-speed external clock input (PIC16F505 only) Low-Power Features/CMOS Technology: • Operating Current:- < 175 μA @ 2V, 4 MHz, typical • Standby Current:- 100 nA @ 2V, typical • Low-Power, High-Speed Flash Technology:- 100,000 Flash endurance - > 40 year retention • Fully Static Design • Wide Operating Voltage Range: 2.0V to 5.5V • Wide Temperature Range:- Industrial: -40°C to +85°C- Extended: -40°C to +125°C Peripheral Features (PIC12F508/509): • 6 I/O Pins:- 5 I/O pins with individual direction control- 1 input only pin - High current sink/source for direct LED drive- Wake-on-change- Weak pull-ups • 8-Bit Real-Time Clock/Counter (TMR0) with 8-Bit Programmable Prescaler Peripheral Features (PIC16F505): • 12 I/O Pins:- 11 I/O pins with individual direction control- 1 input only pin- High current sink/source for direct LED drive- Wake-on-change- Weak pull-ups • 8-Bit Real-Time Clock/Counter (TMR0) with 8-Bit Programmable Prescaler

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Ultra-Low-Power Arm® Cortex®-A5 Core-Based MPU, 500 MHz, Graphics Interface, Ethernet 10/100, CAN, USB, PCI 5.0 Pre-Certified Introduction The SAMA5D2 series is a high-performance, ultra-low-power Arm Cortex-A5 CPU-based embedded microprocessor Ultra-Low-Power Arm® Cortex®-A5 Core-Based MPU, 500 MHz, Graphics Interface, Ethernet 10/100, CAN, USB, PCI 5.0 Pre-Certified Introduction The SAMA5D2 series is a high-performance, ultra-low-power Arm Cortex-A5 CPU-based embedded microprocessor (MPU) running up to 500 MHz, with support for multiple memories such as DDR2, DDR3L, LPDDR2, LPDDR3, and QSPI and e.MMC Flash. The devices integrate powerful peripherals for connectivity and user interface applications, and offer advanced security functions (Arm TrustZone®, tamper detection, secure data storage, etc.), as well as high-performance crypto accelerators AES, SHA and TRNG. Selected members of the SAMA5D2 series are qualified for extended industrial temperature range operation (-40°C to 105°C external temperature). The SAMA5D2 series is delivered with a free Linux® distribution and bare metal C examples. Features • Arm Cortex-A5 Core– Armv7-A architecture– Arm TrustZone– NEON™ Media Processing Engine– Up to 500 MHz– ETM/ETB 8 Kbytes • Memory Architecture– Memory Management Unit (MMU)– 32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache– 128-Kbyte L2 cache configurable to be used as an internal SRAM– One 128-Kbyte scrambled internal SRAM– One 160-Kbyte internal ROM • 64-Kbyte scrambled and maskable ROM embedding bootloader/Secure bootloader • 96-Kbyte unscrambled, unmaskable ROM for NAND Flash BCH ECC table– High-bandwidth scramblable 16-bit or 32-bit Double Data Rate (DDR) multiport dynamic RAM controller supporting up to 512 Mbytes 8-bank DDR2/DDR3 (DLL off only) / DDR3L (DLL off only) / LPDDR1/ LPDDR2/LPDDR3, including “on-the-fly” encryption/decryption path– 8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC) • System Running up to 166 MHz in Typical Conditions– Reset Controller (RSTC), Shutdown Controller (SHDWC), Periodic Interval Timer (PIT), independent Watchdog Timer (WDT) and secure Real-Time Clock (RTC) with clock calibration– One 600 to 1200 MHz PLL for the system and one 480 MHz PLL optimized for high-speed USB– Digital fractional PLL for audio (11.2896 MHz and 12.288 MHz)– Internal low-power 12 MHz RC and 32 kHz typical RC– Selectable 32.768 Hz low-power oscillator and 8 to 24 MHz oscillator– 51 DMA channels including two 16-channel 64-bit Central DMA Controllers © 2022 Microchip Technology Inc. and its subsidiaries Complete Datasheet DS60001476H-page 1 SAMA5D2 Series– 64-bit Advanced Interrupt Controller (AIC)– 64-bit Secure Advanced Interrupt Controller (SAIC)– Three programmable external clock signals • Low-Power Modes– Ultra-low-power mode with fast wake-up capability– Low-power Backup mode with 5-Kbyte SRAM and SleepWalking™ features • Wake up from up to nine wake-up pins, UART reception, analog comparison • Fast wake-up capability • Extended Backup mode with DDR in Self-Refresh mode • Peripherals– LCD TFT controller (LCDC) up to 1024x768 or 1280x768 (still image). Four overlays, rotation, postprocessing and alpha blending, 24-bit parallel RGB interface– ITU-R BT. 601/656/1120 Image Sensor Controller (ISC) supporting up to 5 Mpixel sensors with a parallel 12-bit interface for Raw Bayer, YCbCr, Monochrome and JPEG-compressed sensor interface– Two Synchronous Serial Controllers (SSC), two

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8-bit Microcontrollers - MCU 7KB 192 RAM 33 I/Oatures: • High performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two cycle • Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle • 4 K x 14 words of Program Memory, 192 x 8 bytes of Data Memory (RAM) • Interrupt capability • Eight-level deep hardware stack • Direct, indirect and relative addressing modes • Power-on Reset (POR) • Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • Programmable code protection • Power-saving SLEEP mode • Selectable oscillator options • Low power, high speed CMOS EPROM technology • Wide operating voltage range: 2.5V to 5.5V • High Sink/Source Current 25/25 mA • Commercial, Industrial and Automotive temperature ranges • Low power consumption: - < 5 mA @ 5V, 4 MHz - 23 ???A typical @ 3V, 32 kHz - < 1.2 ???A typical standby current PIC16C7X Peripheral Features: • Timer0: 8-bit timer/counter with 8-bit prescaler • Timer1: 16-bit timer/counter with prescaler can be incremented during SLEEP via external crystal/clock • Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler • Capture, Compare, PWM modules - Capture is 16-bit, max. resolution is 200 ns - Compare is 16-bit, max. resolution is 200 ns - PWM max. resolution is 10-bit • 8-bit multichannel Analog-to-Digital converter • Synchronous Serial Port (SSP) with SPITM and I2CTM • Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) • Parallel Slave Port (PSP), 8-bits wide with external RD, WR and CS controls • Brown-out detection circuitry for Brown-out Reset (BOR) Pin Diagram: • PIC16C63A • PIC16C73B • PIC16C65B • PIC16C74B Devices I/O Pins A/D Chan. PSP Interrupts PIC16C63A 22 - No 10 PIC16C65B 33 - Yes 11 PIC16C73B 22 5 No 11 PIC16C74B 33 8 Yes 12 PDIP, Windowed CERDIP RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0/INT VDD VSS RD7/PSP7 RD6/PSP6 RD5/PSP5 RD4/PSP4 RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 MCLR/VPP RA0/AN0 RA1/AN1 RA2/AN2 RA3/AN3/VREF RA4/T0CKI RA5/SS/AN4 RE0/RD/AN5 RE1/WR/AN6 RE2/CS/AN7 VDD VSS OSC1/CLKIN OSC2/CLKOUT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RD0/PSP0 RD1/PSP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 PIC16C65B PIC16C74B 8

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The SAM9G20 embedded microprocessor unit is based on the integration of an Arm926EJ-S™ processor with fast ROM and RAM memories and a wide range of peripherals. The SAM9G20 embeds an Ethernet MAC, one USB Device Port, and a dual port USB Host controller with on-chip USB transceivers. It also integrates several standard peripherals, such as the USART, SPI, TWI, Timer Counters, Synchronous Serial Controller, ADC and MultiMedia Card Interface. The SAM9G20 is architectured on a 6-layer matrix, allowing a maximum internal bandwidth of six 32-bit buses. It also features an External Bus Interface capable of interfacing with a wide range of memory devices. The SAM9G20 is an enhancement of the SAM9260 with the same peripheral features. It is pin-to-pin compatible with the exception of power supply pins. Speed is increased to reach 400 MHz on the Arm core and 133 MHz on the system bus and EBI. Features • Incorporates the Arm926EJ-S Arm® Thumb® Processor - DSP Instruction Extensions, Arm Jazelle® Technology for Java® Acceleration - 32-Kbyte Data Cache, 32-Kbyte Instruction Cache, Write Buffer - CPU Frequency 400 MHz - Memory Management Unit - EmbeddedICE, Debug Communication Channel Support • Additional Embedded Memories - One 64-Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed - Two 16-Kbyte Internal SRAM, Single-cycle Access at Maximum Matrix Speed • External Bus Interface (EBI) - Supports SDRAM, Static Memory, ECC-enabled SLC NAND Flash and CompactFlash® • USB 2.0 Full Speed (12 Mbit/s) Device Port - On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM • USB 2.0 Full Speed (12 Mbit/s) Host and Dual Port - Single or Dual On-chip Transceivers - Integrated FIFOs and Dedicated DMA Channels • Ethernet MAC 10/100 Base T - Media Independent Interface or Reduced Media Independent Interface - 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit • Image Sensor Interface - ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate - 12-bit Data Interface for Support of High Sensibility Sensors - SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format • Bus Matrix - Six 32-bit-layer Matrix - Boot Mode Select Option, Remap Command • Fully-featured System Controller, including - Reset Controller, Shutdown Controller - 128-bit (4 x 32-bit) General Purpose Backup Registers - Clock Generator and Power Management Controller

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8-bit Microcontrollers - MCU• High performance, low power Atmel® AVR® 8-Bit Microcontroller • Advanced RISC architecture – 130 powerful instructions – most single clock cycle execution – 32 × 8 general purpose working registers – Fully static operation – Up to 16MIPS throughput at16MHz (Atmel ATmega169A/169PA/649A/649P) – Up to 20 MIPS throughput at 20MHz (Atmel ATmega329A/329PA/3290A/3290PA/6490A/6490P) – On-chip 2-cycle multiplier • High endurance non-volatile memory segments – In-system self-programmable flash program memory • 16Kbytes (Atmel ATmega169A/ATmega169PA) • 32Kbytes (Atmel ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 64Kbytes (Atmel ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – EEPROM • 512bytes (ATmega169A/ATmega169PA) • 1Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 2Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – Internal SRAM • 1Kbytes (ATmega169A/ATmega169PA) • 2Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA) • 4Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P) – Write/erase cyles: 10,000 flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (1) – Optional Boot Code Section with Independent Lock Bits • In-System Programming by On-chip Boot Program • True read-while-write operation – Programming lock for software security • Atmel QTouch® library support – Capacitive touch buttons, sliders and wheels – Atmel QTouch and QMatrix acquisition – Up to 64 sense channels • JTAG (IEEE std. 1149.1 compliant) Interface – Boundary-scan capabilities according to the JTAG standard – Extensive on-chip debug support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface • Peripheral features – 4 × 25 segment LCD driver (ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P) – 4 × 40 segment LCD driver (ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P) – Two 8-bit Timer/Counters with Separate Prescaler and Compare mode – One 16-bit Timer/Counter with Separate Prescaler, Co

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8-bit Microcontrollers - MCU 128K8-bit Microcontrollers - MCU 128K8-bit Microcontrollers - MCU 128K FLASH;2K EE;8K SRAM;1.6-3.6V;32MHz8-bit Microcontrollers - MCU 128K FLASH;2K EE;8K SRAM;1.6-3.6V;32MHz

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Low-Power Features: • Power-Managed modes: - Primary Run: RC oscillator, 76 ???A, 1 MHz, 2V - RC_RUN: 7 ???A, 31.25 kHz, 2V - SEC_RUN: 9 ???A, 32 kHz, 2V - Sleep: 0.1 ???A, 2V • Timer1 Oscillator: 1.8 ???A, 32 kHz, 2V • Watchdog Timer: 2.2 ???A, 2V • Two-Speed Oscillator Start-up Oscillators: • Three Crystal modes: - LP, XT, HS: up to 20 MHz • Two External RC modes • One External Clock mode: - ECIO: up to 20 MHz • Internal oscillator block: - 8 user selectable frequencies: 31 kHz, 125 kHz, 250 kHz, 500 kHz, 1 MHz, 2 MHz, 4 MHz, 8 MHz Peripheral Features: • Capture, Compare, PWM (CCP) module: - Capture is 16-bit, max. resolution is 12.5 ns - Compare is 16-bit, max. resolution is 200 ns - PWM max. resolution is 10-bit • 10-bit, 7-channel Analog-to-Digital Converter • Synchronous Serial Port (SSP) with SPI (Master/Slave) and I2C™ (Slave) • Addressable Universal Synchronous Asynchronous Receiver Transmitter (AUSART/SCI) with 9-bit address detection: - RS-232 operation using internal oscillator (no external crystal required) • Dual Analog Comparator module: - Programmable on-chip voltage reference - Programmable input multiplexing from device inputs and internal voltage reference - Comparator outputs are externally accessible Pin Diagram Special Microcontroller Features: • 100,000 erase/write cycles Enhanced Flash program memory typical • 1,000,000 typical erase/write cycles EEPROM data memory typical • EEPROM Data Retention: > 40 years • In-Circuit Serial Programming™ (ICSP™) via two pins • Processor read/write access to program memory • Low-Voltage Programming • In-Circuit Debugging via two pins • Extended Watchdog Timer (WDT): - Programmable period from 1 ms to 268s • Wide operating voltage range: 2.0V to 5.5V RA1/AN1 RA0/AN0 RA7/OSC1/CLKI RA6/OSC2/CLKO VDD RB7/AN6/PGD/ RB6/AN5/PGC/ RB5/SS/TX/CK RB4/SCK/SCL RA3/AN3/VREF+/ RA4/AN4/T0CKI/ RA5/MCLR/VPP VSS RB0/INT/CCP1(1) RB1/SDI/SDA RB2/SDO/RX/DT RB3/PGM/CCP1(1) 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 PIC16F88 T1OSI T1OSO/T1CKI C2OUT C1OUT VREF- RA2/AN2/CVREF/ 18-Pin PDIP, SOIC Note 1: The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register. Device Program Memory Data Memory I/O Pins 10-bit A/D (ch) CCP (PWM) AUSART Comparators SSP Timers Flash 8/16-bit (bytes) # Single-Word Instructions SRAM (bytes) EEPROM (bytes) PIC16F87 7168 4096 368 256 16 N/A 1 Y 2 Y 2/1 PIC16F88 7168 4096 368 256 16 1 1 Y 2 Y 2/1 18/20/28-Pin Enhanced Flash MCUs with nanoWatt Technology PIC16F87/88 DS30487D-page 2 ??? 2002-2013 Microchip Technology Inc. Pin Diagrams R

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8-bit Microcontrollers - MCU 32KB 2048 RAM 52I/O Controller Family/Series: PIC18F; Device Marking: PIC18F6520-I/PT; EEPROM Memory Size: 1KB; Flash Memory Size: 32KB; IC Generic Number Controller Family/Series: PIC18F; Device Marking: PIC18F6520-I/PT; EEPROM Memory Size: 1KB; Flash Memory Size: 32KB; IC Generic Number

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16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog Operating Conditions • 3.0V to 3.6V, -40oC to +125oC, DC to 60 MIPS • 3.0Vto3.6V,-40oCto+85oC,DCto70MIPS Core: 16-Bit dsPIC33E/PIC24E CPU • Code-Efficient (C and Assembly) architecture • Two 40-Bit Wide Accumulators • Single-Cycle (MAC/MPY) with Dual Data Fetch • Single-Cycle Mixed-Sign MUL Plus Hardware Divide • 32-Bit Multiply Support Clock Management • 2% Internal Oscillator • Programmable PLLs and Oscillator Clock Sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer • Fast Wake-up and Start-up Power Management • Low-Power Management modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset • 1.0 mA/MHz Dynamic Current (typical) • 60 μA IPD Current (typical) High-Speed PWM • Up to Seven PWM Pairs with Independent Timing • Dead Time for Rising and Falling Edges • 8.32 ns PWM Resolution • PWM Support for: - DC/DC, AC/DC, Inverters, PFC, Lighting - BLDC, PMSM, ACIM, SRM • Programmable Fault Inputs • Flexible Trigger Configurations for ADC Conversions Advanced Analog Features • Two Independent ADC modules: - One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H - One 10-bit ADC, 1.1 Msps with four S&H - Eight S&H using both ADC 10-bit modules - 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices) • Flexible and Independent ADC Trigger Sources • Comparators: - Up to three Analog Comparator modules - Programmable references with 32 voltage points Timers/Output Compare/Input Capture • 27 General Purpose Timers: - Nine 16-bit and up to four 32-bit Timers/Counters - 16 OC modules configurable as Timers/Counters - Two 32-bit Quadrature Encoder Interface (QEI) modules configurable as Timers/Counters • 16 IC modules • Peripheral Pin Select (PPS) to allow Function Remap • Real-Time Clock and Calendar (RTCC) module Communication Interfaces • USB 2.0 OTG-Compliant Full-Speed Interface • Four UART modules (15 Mbps) - Supports LIN/J2602 protocols and IrDA® • Four 4-Wire SPI modules (15 Mbps) • Two ECANTM modules (1 Mbaud) CAN 2.0B Support • Two I2C modules (up to 1 Mbaud) with SMBus Support • Data Converter Interface (DCI) module with Support for I2S and Audio Codecs • PPS to allow Function Remap • Parallel Master Port (PMP) • Programmable Cyclic Redundancy Check (CRC) Direct Memory Access (DMA) • 15-Channel DMA with User-Selectable Priority Arbitration • UART, USB, SPI, ADC, ECANTM, IC, OC, Timers, DCI/I2S, PMP Input/Output • Sink/Source 10 mA on All Pins • 5V Tolerant Pins • Selectable Open-Drain, Pull-ups and Pull-Downs • Up to 5 mA Overvoltage Clamp Current • External Interrupts on All I/O pins Qualification and Class B Support • AEC-Q100 REVG (Grade 1 -40oC to +125oC) Planned • AEC-Q100 REVG (Grade 0 -40oC to +150oC) Planned • Class B Safety Library, IEC 60730 Debugger Development Support • In-Circuit and In-Application Programming • Five Program and Three Complex Data Breakpoints • IEEE 1149.2 Compatible (JTAG) Boundary Scan • Trace and Run-Time Watch  2009-2012 Microchip Technology Inc. DS70616G-pa

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256-Kbit I2C Serial EEPROM
Features • Single Supply with Operation Down to 1.7V for 24AA256 and 24FC256 Devices, 2.5V for 24LC256 Devices • Low-Power CMOS Technology: - Write current: 3 mA, maximum - Standby current: 1 µA maximum (I-temp.) • Two-Wire Serial Interface, I2C Compatible • Cascadable up to Eight Devices • Schmitt Trigger Inputs for Noise Suppression • Output Slope Control to Eliminate Ground Bounce • 100 kHz, 400 kHz and 1 MHz Compatibility • Page Write Time: 5 ms, maximum • Self-Timed Erase/Write Cycle • 64-Byte Page Write Buffer • Hardware Write-Protect • ESD Protection >4000V • More than One Million Erase/Write Cycles • Data Retention >200 years • Factory Programming Available • RoHS Compliant • Temperature Ranges: • Automotive AEC-Q100 Qualified Packages • 8-Ball CSP, 8-Lead DFN, 8-Lead MSOP, 8-Lead PDIP, 8-Lead SOIC, 8-Lead SOIJ, 8-Lead TDFN and 8-Lead TSSOP Description The Microchip Technology Inc. 24XX256(1) is a 32K x 8 (256-Kbit) Serial Electrically Erasable PROM (EEPROM), capable of operation across a broad voltage range (1.7V to 5.5V). It has been developed for advanced, low-power applications such as personal communications or data acquisition. This device also has a page write capability of up to 64 bytes of data. This device is capable of both random and sequential reads up to the 256K boundary. Functional address lines allow up to eight devices on the same bus, for up to 2 Mbit address space.

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Low-Power Features: • Power-Managed modes: - Run: CPU on, peripherals on - Idle: CPU off, peripherals on - Sleep: CPU off, peripherals off • Two-Speed Oscillator Start-up • Fail-Safe Clock Monitor • Power-Saving Peripheral Module Disable (PMD) • Ultra Low-Power Wake-up • Fast Wake-up, 1 ???s Typical • Low-Power WDT, 300 nA Typical • Ultra Low 50 nA Input Leakage • Run mode Currents Down to 5.5 ???A, Typical • Idle mode Currents Down to 1.7 ???A Typical • Sleep mode Currents Down to Very Low 20 nA, Typical • RTCC Current Downs to Very Low 700 nA, Typical Special Microcontroller Features: • Operating Voltage Range: 1.8V to 5.5V • On-Chip 3.3V Regulator • Operating Speed up to 64 MHz • Up to 128 Kbytes On-Chip Flash Program Memory • Data EEPROM of 1,024 Bytes • 4K x 8 General Purpose Registers (SRAM) • 10,000 Erase/Write Cycle Flash Program Memory, Minimum • 1,000,000 Erase/write Cycle Data EEPROM Memory, Typical • Flash Retention: 40 Years, Minimum • Three Internal Oscillators: LF-INTRC (31 kHz), MF-INTOSC (500 kHz) and HF-INTOSC (16 MHz) • Self-Programmable under Software Control • Priority Levels for Interrupts • 8 x 8 Single-Cycle Hardware Multiplier • Extended Watchdog Timer (WDT): - Programmable period from 4 ms to 4,194s (about 70 minutes) • In-Circuit Serial Programming™ (ICSP™) via Two Pins • In-Circuit Debug via Two

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Digital Signal Processors & Controllers - DSP, DSC 16Bit 40MIPS 128KB Flash

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16-bit Microcontrollers - MCU 40MIPS 256KB

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32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM) with Graphics Interface, USB, CAN, and Ethernet Operating Conditions  2.3V to 3.6V, -40oC to +105oC, DC to 80 MHz Core: 80 MHz/105 DMIPS MIPS32 M4K MIPS16e mode for up to 40% smaller code size  Code-efficient (C and Assembly) architecture  Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply Clock Management  0.9% internal oscillator (on some variants)  Programmable PLLs and oscillator clock sources  Fail-Safe Clock Monitor (FSCM)   Independent Watchdog Timer  Fast wake-up and start-up Power Management  Low-power management modes (Sleep and Idle)  Integrated Power-on Reset, Brown-out Reset  0.5 mA/MHz dynamic current (typical)  41  A IPD current (typical) Graphics Features  External graphics interface with up to 34 Parallel Master Port (PMP) pins: - Interface to external graphics controller - Capable of driving LCD directly with DMA and internal or external memory Analog Features  ADC Module: - 10-bit 1 Msps rate with one Sample and Hold (S&H) - 16 analog inputs - Can operate during Sleep mode  Flexible and independent ADC trigger sources  Comparators: - Two dual-input Comparator modules - Programmable references with 32 voltage points Packages Note: All dimensions are in millimeters (mm) unless specified. Timers/Output Compare/Input Capture  Five General Purpose Timers: - Five 16-bit and up to two 32-bit Timers/Counters  Five Output Compare (OC) modules  Calendar (RTCC) module Communication Interfaces   USB 2.0-compliant Full-Speed OTG controller  10/100 Mbps Ethernet MAC with MII and RMII interface  CAN module: - 2.0B Active with DeviceNetTM addressing support  Six UART modules (20 Mbps): - Supports LIN 2.1 protocols and IrDA support  Up to four 4-wire SPI modules (25 Mbps)  Up to five I2C modules (up to 1 Mbaud) with SMBus

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16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog
 USB 2.0 OTG-Compliant Full-Speed Interface • Four UART modules (15 Mbps) - Supports LIN/J2602 protocols and IrDA® • Four 4-Wire SPI modules (15 Mbps) • Two ECAN™ modules (1 Mbaud) CAN 2.0B Support • Two I2C modules (up to 1 Mbaud) with SMBus Support • Data Converter Interface (DCI) module with Support for I 2S and Audio Codecs • PPS to allow Function Remap • Parallel Master Port (PMP) • Programmable Cyclic Redundancy Check (CRC)

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16-bit Microcontrollers - MCU 100P 512KB 52KB RAM 60 MHz USB16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced AnalogOperating Conditions • 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS • 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS Core: 16-Bit dsPIC33E/PIC24E CPU • Code-Efficient (C and Assembly) architecture • Two 40-Bit Wide Accumulators • Single-Cycle (MAC/MPY) with Dual Data Fetch • Single-Cycle Mixed-Sign MUL P

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MIXED SIGNAL MICROCONTROLLER 1 FEATURES 23 • LowSupply-Voltage Range, 1.8 V to 3.6 V • Ultra-Low Power Consumption– Active Mode: 270 µA at 1 MHz, 2.2 V– Standby Mode (VLO): 0.3 µA– Off Mode (RAM Retention): 0.1 µA • Ultra-Fast Wake-Up From Standby Mode in Less Than 1 µs • 16-Bit RISC Architecture, 62.5-ns Instruction Cycle Time • Basic Clock Module Configurations:– Internal Frequencies up to 16 MHz– Internal Very Low-Power LF Oscillator– 32-kHz Crystal– Internal Frequencies up to 16 MHz With Four Calibrated Frequencies to ±1%– Resonator– External Digital Clock Source– External Resistor • 12-Bit Analog-to-Digital (A/D) Converter With Internal Reference, Sample-and-Hold, and Autoscan Feature • 16-Bit Timer_A With Three Capture/Compare Registers • 16-Bit Timer_B With Seven Capture/Compare With Shadow Registers • Four Universal Serial Communication Interfaces (USCI)– USCI_A0 and USCI_A1– Enhanced UART Supporting Auto-Baudrate Detection– IrDA Encoder and Decoder– Synchronous SPI– USCI_B0 and USCI_B1– I2C™– Synchronous SPI 1 • On-Chip Comparator • Supply Voltage Supervisor/Monitor With Programmable Level Detection • Brownout Detector • Bootstrap Loader • Serial Onboard Programming, No External Programming Voltage Needed, Programmable Code Protection by Security Fuse • Family Members Include:– MSP430F233– 8KB+256B Flash Memory,– 1KBRAM– MSP430F235– 16KB+256B Flash Memory– 2KBRAM– MSP430F247, MSP430F2471 (1)– 32KB+256B Flash Memory– 4KBRAM– MSP430F248, MSP430F2481– 48KB+256B Flash Memory– 4KBRAM– MSP430F249, MSP430F2491– 60KB+256B Flash Memory– 2KBRAM– MSP430F2410– 56KB+256B Flash Memory– 4KBRAM • Available in 64-Pin QFP and 64-Pin QFN Packages (See Available Options) • ForComplete Module Descriptions, See MSP430x2xx Family User’s Guide (SLAU144) (1) The MSP430F24x1 devices are identical to the MS
MSP430F233TPM MSP430F235TPM MSP430F247TPM MSP430F2471TPM PLASTIC 64-PIN QFN (RGC) MSP430F233TRGC MSP430F235TRGC MSP430F247TRGC MSP430F2471TRGC MSP430F248TPM MSP430F2481TPM MSP430F249TPM MSP430F2491TPM MSP430F2410TPM MSP430F248TRGC MSP430F2481TRGC MSP430F249TRGC MSP430F2491TRGC MSP430F2410TRG

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PCF85162 32 × 4 universal LCD driver for low multiplex rates Rev. 5.1 — 2 September 2021 Product data sheet 1 General description The PCF85162 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 32 segments. It can be easily cascaded for larger LCD applications. The PCF85162 is compatible with most microcontrollers and communicates via the two-line bidirectional I2C-bus. Communication overheads are minimized by a display RAM with auto-incremented addressing, by hardware subaddressing, and by display memory switching (static and duplex drive modes). For a selection of NXP LCD segment drivers, see Table 24. 2 Features and benefits • Single chip LCD controller and driver • Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing • Selectable display bias configuration: static, 1 ⁄2, or 1 ⁄3 • Internal LCD bias generation with voltage-follower buffers • 32 segment drives: – Up to 16 7-segment numeric characters – Up to 8 14-segment alphanumeric characters – Any graphics of up to 128 segments/elements • 32 × 4-bit RAM for display data storage • Display memory bank switching in static and duplex drive modes • Versatile blinking modes • Independent supplies possible for LCD and logic voltages • Wide power supply range: from 1.8 V to 5.5 V • Wide logic LCD supply range: – From 2.5 V for low-threshold LCDs – Up to 6.5 V for guest-host LCDs and high-threshold twisted nematic LCDs • Low power consumption • 400 kHz I2C-bus interface • No external components required • Manufactured in silicon gate CMOS process 1 The definition of the abbreviations and acronyms used in thi

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• Delivery Time: 2-3 WEEKS